ATTINY87_14 Datasheet, PDF (76/261 Pages) ATMEL Corporation – 8-bit AVR Microcontroller with 8K/16K Bytes In-System

Table 9-4 and Table 9-5 on page 77 relate the alternate functions of Port A to the overriding signals shown in Figure 9-6 on
page 70.
Table 9-4.
Signal
Name
PUOE
PUOV
DDOE
Overriding Signals for Alternate Functions in PA7..PA4
PA7/PCINT7/
ADC7/AIN1
/XREF/AREF
PA6/PCINT6/
ADC6/AIN0/SS
PA5/PCINT5/ADC5/
T1/USCK/SCL/SCK
0
SPE & MSTR
SPE & MSTR
0
PORTA6 & PUD
PORTA5 & PUD
0
SPE & MSTR
(SPE & MSTR) |
(USI_2_WIRE & USIPOS)
DDOV
0
0
(USI_SCL_HOLD | PORTA5)
& DDRA6
PVOE
0
0
PVOV
0
0
PTOE
0
0
ADC7D |
ADC6D |
DIEOE
(PCIE0 & PCMSK07) (PCIE0 & PCMSK06)
DIEOV PCIE0 & PCMSK07 PCIE0 & PCMSK06
DI
PCINT7
AIO
ADC7 -/- AIN1 -/-
XREF -/- AREF
PCINT6 -/- SS
ADC6 -/- AIN0
(SPE & MSTR) |
(USI_2_WIRE & USIPOS
& DDRA5)
{ (SPE & MSTR) ?
(SCK_OUTPUT) :
~ (USI_2_WIRE & USIPOS
& DDRA5) }
USI_PTOE & USIPOS
ADC5D |
(USISIE & USIPOS) |
(PCIE0 & PCMSK05)
(USISIE & USIPOS) |
(PCIE0 & PCMSK05)
PCINT5 -/- T1
-/- USCK -/- SCL -/- SCK
ADC5
PA4/PCINT4/ADC4/
ICP1/DI/SDA/MOSI
SPE & MSTR
PORTA4 & PUD
(SPE & MSTR) |
(USI_2_WIRE & USIPOS)
{ (SPE & MSTR) ?
(0) :
(USI_SHIFTOUT | PORTA4)
& DDRA4) }
(SPE & MSTR) |
(USI_2_WIRE & USIPOS
& DDRA4)
{ (SPE & MSTR) ?
(MOSI_OUTPUT) :
~ (USI_2_WIRE & USIPOS
& DDRA4) }
0
ADC4D |
(USISIE & USIPOS) |
(PCIE0 & PCMSK04)
(USISIE & USIPOS) |
(PCIE0 & PCMSK04)
PCINT4 -/- ICP1
-/- DI -/- SDA -/- MOSI
ADC4
76 ATtiny87/ATtiny167 [DATASHEET]
7728H–AVR–03/14