SAM9G46_14 Datasheet, PDF (745/1286 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded MPU

35.14.6 HSMCI Command Register
Name: HS
MCI_CMDR
Addresses: 0xFFF80014 (0), 0xFFFD0014 (1)
Access: Write- only
31
30
29
28
–
–
–
–
23
22
21
20
–
–
TRTYP
15
14
13
12
–
–
–
MAXLAT
7
6
5
4
RSPTYP
27
BOOT_ACK
26
ATACS
19
18
TRDIR
11
10
OPDCMD
3
2
CMDNB
25
24
IOSPCMD
17
16
TRCMD
9
8
SPCMD
1
0
This register is write-protected while CMDRDY is 0 in HSMCI_SR. If an Interrupt command is sent, this register is only
writeable by an interrupt response (field SPCMD). This means that the current command execution cannot be interrupted
or modified.
• CMDNB: Command Number
This is the command index.
• RSPTYP: Response Type
Value
0
1
2
3
Name
NORESP
48_BIT
136_BIT
R1B
Description
No response.
48-bit response.
136-bit response.
R1b response type
• SPCMD: Special Command
Value
0
1
2
3
4
Name
STD
INIT
SYNC
CE_ATA
IT_CMD
Description
Not a special CMD.
Initialization CMD:
74 clock cycles for initialization sequence.
Synchronized CMD:
Wait for the end of the current data block transfer before sending the pending command.
CE-ATA Completion Signal disable Command.
The host cancels the ability for the device to return a command completion signal on the
command line.
Interrupt command:
Corresponds to the Interrupt Mode (CMD40).
SAM9G46 Series [DATASHEET]
Atmel-11028F-ATARM-SAM9G46-Datasheet_16-Oct-14
745