AT91SAM9XE_14 Datasheet, PDF (705/846 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded MPU

Figure 39-11. Data OUT Transfer for Ping-pong Endpoint
Host Sends First Data Payload
Microcontroller Reads Data 1 in Bank 0,
Host Sends Second Data Payload
Microcontroller Reads Data2 in Bank 1,
Host Sends Third Data Payload
USB Bus
Packets
Data OUT
PID
Data OUT 1
ACK
PID
Data OUT
PID
Data OUT 2
ACK
PID
Data OUT
PID
Data OUT 3
A
P
RX_DATA_BK0 Flag
(UDP_CSRx)
RX_DATA_BK1 Flag
(UDP_CSRx)
Set by USB Device,
Data Payload Written
in FIFO Endpoint Bank 0
Interrupt Pending
Set by USB Device,
Data Payload Written
in FIFO Endpoint Bank 1
Cleared by Firmware
Cleared by Firmware
Interrupt Pending
FIFO (DPR)
Bank 0
Data OUT1
Write by USB Device
Data OUT 1
Read By Microcontroller
Data OUT 3
Write In Progress
FIFO (DPR)
Bank 1
Data OUT 2
Write by USB Device
Data OUT 2
Read By Microcontroller
Note: An interrupt is pending while the RX_DATA_BK0 or RX_DATA_BK1 flag is set.
Warning: When RX_DATA_BK0 and RX_DATA_BK1 are both set, there is no way to determine which one to
clear first. Thus the software must keep an internal counter to be sure to clear alternatively RX_DATA_BK0 then
RX_DATA_BK1. This situation may occur when the software application is busy elsewhere and the two banks are
filled by the USB host. Once the application comes back to the USB driver, the two flags are set.
39.5.2.8 Stall Handshake
A stall handshake can be used in one of two distinct occasions. (For more information on the stall handshake, refer
to Chapter 8 of the Universal Serial Bus Specification, Rev 2.0.)
 A functional stall is used when the halt feature associated with the endpoint is set. (Refer to Chapter 9 of the
Universal Serial Bus Specification, Rev 2.0, for more information on the halt feature.)
 To abort the current request, a protocol stall is used, but uniquely with control transfer.
The following procedure generates a stall packet:
1. The microcontroller sets the FORCESTALL flag in the UDP_CSRx endpoint’s register.
2. The host receives the stall packet.
3. The microcontroller is notified that the device has sent the stall by polling the STALLSENT to be set. An
endpoint interrupt is pending while STALLSENT is set. The microcontroller must clear STALLSENT to clear
the interrupt.
When a setup transaction is received after a stall handshake, STALLSENT must be clea red in order to prevent
interrupts due to STALLSENT being set.
AT91SAM9XE Series [DATASHEET]
Atmel-6254D-ATARM-AT91SAM9XE-Datasheet_29-Oct-14
705