AT24C02B Datasheet, PDF (7/26 Pages) ATMEL Corporation – Two-wire Serial EEPROM

4. Bus Timing
Figure 4-1.
SCL: Serial Clock, SDA: Serial Data I/O^®
t_F
t_HIGH
SCL
t_LOW
t_LOW
SDA IN
t_SU.STA
t_HD.STA
t_HD.DAT
t_SU.DAT
t_AA
t_DH
SDA OUT
5. Write Cycle Timing
Figure 5-1. SCL: Serial Clock, SDA: Serial Data I/O
SCL
AT24C02B
t_R
t_SU.STO
t_BUF
SDA
8th BIT
ACK
WORDn
STOP
CONDITION
(1)
t_wr
START
CONDITION
Note: 1. The write cycle time t_WR is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle.
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5126H–SEEPR–8/07