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AT91SAM7X512_1 Datasheet, PDF (650/687 Pages) ATMEL Corporation – AT91 ARM Thumb-based Microcontrollers
41.3 AT91SAM7X512 Errata - Rev. A Parts
Refer to Section 41.1 “Marking” on page 641.
41.3.1 Analog-to-Digital Converter (ADC)
41.3.1.1
ADC: DRDY Bit Cleared
The DRDY Flag should be clear only after a read of ADC_LCDR (Last Converted Data Regis-
ter). A read of any ADC_CDRx register (Channel Data Register) automatically clears the DRDY
flag.
Problem Fix/Workaround:
None
41.3.1.2
ADC: DRDY not Cleared on Disable
When reading LCDR at the same instant as an end of conversion, with DRDY already active,
DRDY is kept active regardless of the enable status of the current channel. This sets DRDY,
whereas new data is not stored.
Problem Fix/Workaround
None
41.3.1.3
ADC: DRDY Possibly Skipped due to CDR Read
Reading CDR for channel "y" at the same instant as an end of conversion on channel "x" with
EOC[x] already active, leads to skipping to set the DRDY flag if channel "x" is enabled.
Problem Fix/Workaround
Use of DRDY functionality with access to CDR registers should be avoided.
41.3.1.4
ADC: Possible Skip on DRDY when Disabling a Channel
DRDY does not rise when disabling channel "y" at the same time as an end of "x" channel con-
version, although data is stored into CDRx and LCDR.
Problem Fix/Workaround
None.
41.3.1.5
ADC: GOVRE Bit is not Updated
Read of the Status Register at the same instant as an end of conversion leads to skipping the
update of the GOVRE (general overrun) flag. GOVRE is neither reset nor set.
For example, if reading the status while an end of conversion is occurring and:
1. GOVRE is active but DRDY is inactive, does not correspond to a new general overrun
condition but the GOVRE flag is not reset.
2. GOVRE is inactive but DRDY is active, does correspond to a new general overrun con-
dition but the GOVRE flag is not set.
Problem Fix/Workaround
None
41.3.1.6
ADC: GOVRE Bit is not Set when Reading CDR
When reading CDRy (Channel Data Register y) at the same instant as an end of conversion on
channel "x" with the following conditions:
• EOC[x] already active,
650 AT91SAM7X512/256/128 Preliminary
6120H–ATARM–17-Feb-09