U6083B_05 Datasheet, PDF (6/13 Pages) ATMEL Corporation – PWM Power Control IC with Interference Suppression

3. f₃ with duty cycle < 100% with slope reduction capacitor C₄ (see “Output Slope Control”
on page 6)
f₃
=
----------------------------------------------^I--^o--^s---^c----------------------------------------------
2 × (V_T<100 – V_TL) × C₂ + 2V_Batt × C₄
where C₂ = 68 nF, I_OSC = 45 µA, C₄ = 1.8 nF
f₃ = ... = 70 Hz
By selecting different values of C₂ and C₄, it is possible to have a range of oscillator frequencies
from 10 to 2000 Hz as shown in the data sheet.
3.5 Output Slope Control
The slope of the lamp voltage is internally limited to reduce radio interference by limitation of the
voltage gain of the PWM comparator.
Thus, the voltage rise on the lamp is proportional to the oscillator voltage increase at the
switchover time according to the equation.
dV₈/d_t = α₄ × dV₄/d_t = 2 × α₄ × f × (α₂ – α₃) × (V_Batt – I_S × R₃)
when
f = 75 Hz, V_TX = V_T < 100 and α₄ = 63
then
dV₈/d_t = 2 × 63 × 75 Hz × (0.67 – 0.28) × (12V – 4 mA × 15Ω) = 42 V/ms
Via an external capacitor, C₄, the slope can be further reduced as follows:
dV₈/d_t = I_OSC/(C₄ + C₂/α₄)
when
I_OSC = 45 µA, C₄ = 1.8 nF, C₂ = 68 nF and α₄ = 63
then dV₈/d_t = 45 µA/(1.8 nF + 68 nF/63) = 15.6 V/ms
To damp oscillation tendencies, a resistance of 100Ω in series with capacitance C₄ is
recommended.
6 U6083B
4770B–AUTO–09/05