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U6083B_05 Datasheet, PDF (5/13 Pages) ATMEL Corporation – PWM Power Control IC with Interference Suppression
U6083B
3.4 Pin 4, Oscillator
The oscillator determines the frequency of the output voltage. This is defined by an external
capacitor, C2. It is charged with a constant current, I, until the upper switching threshold is
reached. A second current source is then activated which taps a double current, 2 × I, from the
charging current. The capacitor, C2, is thus discharged at the current, I, until the lower switching
threshold is reached. The second source is then switched off again and the procedure starts
once more.
3.4.1
3.4.2
3.4.3
Example for Oscillator Frequency Calculation
Switching thresholds
VT100
VT100
VT<100
VT<100
VTL
VTL
where
= High switching threshold (100% duty cycle)
= VS × α1 = (VBatt – IS × R3) × α1
= High switching threshold (< 100% duty cycle)
= VS × α2 = (VBatt – IS × R3) × α2
= Low switching threshold
= VS × α3 = (VBatt – IS × R3) × α3
α1, α2 and α3 are fixed values
Calculation Example
The above mentioned threshold voltages are calculated for the following values given in the data
sheet.
VBatt
VT100
VT<100
VTL
= 12V, IS = 4 mA, R3 = 150Ω, α1 = 0.7, α2 = 0.67 and α3 = 0.28
= (12V – 4 mA × 150Ω) × 0.7 ≈ 8V
= 11.4V × 0.67 = 7.6V
= 11.4V × 0.28 = 3.2V
Oscillator Frequency
3 cases have to be distinguished
1. f1 for duty cycle = 100%, no slope reduction with capacitor C4
(see Figure 7-1 on page 11)
f1
=
-------------------------I--O---S---C-------------------------- , where
2 × (VT100 – VTL) × C2
C2 = 68 nF, IOSC = 45
µA
f1 = ... = 75 Hz
2. f2 for duty cycle < 100%, no slope reduction with capacitor C4
For a duty cycle of less than 100%, the oscillator frequency, f, is as follows:
f2
=
--------------------------I--O----S---C---------------------------
2 × (VT<100 – VTL) × C2
,
where
C2
=
68
nF,
IOSC
=
45
µA
f2 = ... = 69 Hz
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4770B–AUTO–09/05