PC8260 Datasheet, PDF (6/53 Pages) ATMEL Corporation – PowerPC-based Communications Processors

Communication
The CPM contains features that allow the PC8260 to excel in a variety of applications
Processor Module (CPM) ^{targeted mainly for networking and telecommunication markets.}
The CPM is a superset of the PC8260 PowerQUICC CPM, with enhancements on the
CP performance and additional hardware and microcode routines that support high bit
rate protocols like ATM (up to 155 Mbps full-duplex) and Fast Ethernet (100 Mbps full-
duplex).
The following list summarizes the major features of the CPM:
• The communications processor (CP) is an embedded 32-bit RISC controller
residing on a separate bus (CPM local bus) from the 60x bus (used by the system
core). With this separate bus, the CP does not affect the performance of the
PowerPC core. The CP handles the lower layer tasks and DMA control activities,
leaving the PowerPC core free to handle higher layer activities. The CP has an
instruction set optimized for communications, but can also be used for general-
purpose applications, relieving the sys-tem core of small often repeated tasks.
• Two serial DMAs (SDMAs) that can do simultaneous transfers, optimized for burst
transfers to the 60x bus and to the local bus.
• Three full-duplex, serial fast communications controllers (FCCs) supporting ATM
(155 Mbps) protocol through UTOPIA2 interface (there are two UTOPIA interfaces
on the PC8260), IEEE 802.3 and Fast Ethernet protocols, HDLC up to E3 rates (45
Mbps) and totally transparent operation. Each FCC can be configured to transmit
fully transparent and receive HDLC, or vice-versa.
• Two multichannel controllers (MCCs) that can handle an aggregate of 256 x 64
Kbps HDLC or transparent channels, multiplexed on up to eight TDM interfaces.
The MCC also supports super-channels of rates higher than 64 Kbps and
subchanneling of the 64-Kbps channels.
• Four full-duplex serial communications controllers (SCCs) supporting
IEEE802.3/Ethernet, high-level synchronous data link control, HDLC, local talk,
UART, synchronous UART, BISYNC and transparent.
• Two full-duplex serial management controllers (SMC) supporting GCI, UART, and
transparent operations.
• Serial peripheral interface (SPI) and I²C bus controllers.
• Time-slot assigner (TSA) that supports multiplexing of data from any of the four
SCCs, three FCCs, and two SMCs.
Software Compatibility
Issues
As much as possible, the PC8260 CPM features were made similar to those of the pre-
vious devices (PC860). The code ports easily from previous devices to the PC8260,
except for new protocols supported by the PC8260.
Although many registers are new, most registers retain the old status and event bits, so
an understanding of the programming models of the 68360, PC860, or PC850 is helpful.
Note that the PC8260 initialization code requires changes from the PC8260 initialization
code.
6 PC8260 PowerQUICC II
2131B–HIREL–02/03