ATR2732N3 Datasheet, PDF (6/14 Pages) ATMEL Corporation – Integrated DAB One-chip Front End

Figure 3-1. Functional Block Diagram with Labelled Inputs and Outputs
4)
5)
6)
3)
7)
1)
Gain
cntl
2)
Vtune
gen.
VCO
VCO
L-band
PLL
VHF
frac. PLL
A
D
RSSI
PWR
cntl
Control unit
SPI interface
3.2 AGC in General
There are three AGCs in the ATR2732N3, one for the RF signals (around the LNAs) (1) and (3),
one for the very beginning of the IF path (mainly VHF mixer), and one for the IF amplifiers (5)
down to the output to baseband (7).
In these AGCs, the output signals of the relevant blocks are amplified, weakly band-pass fil-
tered, rectified, and, finally, low-pass filtered. The voltage derived in this power-measurement
process is compared to a voltage threshold which can be digitally controlled by several bits,
independently of each other. The setting is done via the control bus. Depending on the result of
this comparison, charge pumps feed a positive or negative current in order to charge or dis-
charge external capacitors. The voltage of these external capacitors is used to control the gains
of practically all blocks in the signal path.
By means of the control bus, the current of the AGC charge pump can be selected as specified
in the following table:
Table 3-1.
MSB
0
0
0
0
1
1
1
1
Selection of Time Constant Factor
LSB
Time Constant Factor
0
0
Infinite
0
1
32
1
0
16
1
1
8
0
0
4
0
1
2
1
0
1
1
1
0.2
The input pin WAGC, set to logical 1, always sets all AGCs to time constant Infinite (meaning
there is practically no current to the AGC capacitors), regardless of the actual status of the bus
settings.
6 ATR2732N3
9129AS–DAB–04/08