ATC35 Datasheet, PDF (6/14 Pages) ATMEL Corporation – Cell-based ASIC

IO35lib Low Slew Rate
Cells
Table 11. Core-driven Clock Buffer Pads
Cell Name
Drive Strength
Non-Inverting
PC3C01
1x
•
PC3C02
2x
•
PC3C03
3x
•
PC3C04
4x
•
vddDC Pad
•
•
•
•
Pad Sites Used
1
1
1
1
All IO35lib cells are slew rate controlled. Advantage has been taken of the 3.3V to 5V
level shifter (which is slow by construction) to reduce the slew rate without reducing
speed.
Table 12. IO35lib Pads
5V Interface
Pad Name
3-State
I/O
Output
Only
3-State
Output Only
Input
Only
Drive
Strength
Pad Sites
Used
mc5b0x
•
2 mA, 4 mA,
8 mA, 16 mA
1
mc5d00
•
1
mc5o0x
•
2 mA, 4 mA,
8 mA, 16 mA
1
mc5t0x
•
2 mA, 4 mA,
8 mA, 16 mA
1
Note: All 3-state I/Os, 3-state output only and input pads are also available with pull-up and
pull-down device.
Table 13. IO35lib Power Pads
Cell Name
mv0e
mv0i
mv3i
mv5e
mc45frell,
mc45freur
mc45frelr,
mc45freul
mc45fr0ll,
mc45fr0ur
vssi
•
•
Power Bus Connections
mixvss
vddi
•
•
•
•
mixvdd
•
•
•
Pad Sites
Used
1
1
1
1
4
4
4
6 ATC35 Summary
1063CS–CBIC–01/03