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AT24C11-10PU-1.8 Datasheet, PDF (6/15 Pages) ATMEL Corporation – Two-wire Serial EEPROM
Figure 3-1.
Bus Timing
SCL: Serial Clock, SDA: Serial Data I/O
tF
tHIGH
SCL
tLOW
tLOW
SDA IN
tSU.STA
tHD.STA
tHD.DAT
tSU.DAT
tAA
tDH
SDA OUT
Figure 3-2. Write Cycle Timing
SCL: Serial Clock, SDA: Serial Data I/O
SCL
tR
tSU.STO
tBUF
SDA
8th BIT
ACK
WORDn
STOP
CONDITION
(1)
twr
START
CONDITION
Note: 1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle.
6 AT24C11
3409G–SEEPR–8/07