AT24C11-10PU-1.8 Datasheet, PDF (5/15 Pages) ATMEL Corporation – Two-wire Serial EEPROM

AT24C11
3. Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external
device. Data on the SDA pin may change only during SCL low time periods (see Figure 3-3 on
page 7). Data changes during SCL high periods will indicate a start or stop condition as defined
below.
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which
must precede any other command (see Figure 3-4 on page 7).
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition which ter-
minates all communications. After a read sequence, the stop command will place the EEPROM
in a standby power mode (see Figure 3-4 on page 7).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the
EEPROM in 8-bit words. Any device on the system bus receiving data (when communicating
with the EEPROM) must pull the SDA bus low to acknowledge that it has successfully received
each word. This must happen during the ninth clock cycle after each word received and after all
other system devices have freed the SDA bus. The EEPROM will likewise acknowledge by pull-
ing SDA low after receiving each address or data word (see Figure 3-5 on page 7).
STANDBY MODE: The AT24C11 features a low power standby mode which is enabled: (a)
upon power-up and (b) after the receipt of the STOP bit and the completion of any internal
operations.
MEMORY RESET: After an interruption in protocol, power loss or system reset, any 2-wire part
can be reset by following these steps:
(a) clock up to 9 cycles, (b) look for SDA high in each cycle while SCL is high and then (c) create
a start condition as SDA is high.
5
3409G–SEEPR–8/07