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| AT17F32_14 Datasheet, PDF (6/14 Pages) ATMEL Corporation – 3.3V Output Capability | |||
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5.10 READY
5.11 SER_EN(1)
5.12 VCC
Open collector reset state indicator. Driven Low during power-up reset, released when power-up
is complete. (recommended 4.7 k⦠pull-up on this pin if used).
The serial enable input must remain High during FPGA configuration operations. Bringing
SER_EN Low enables the 2-Wire Serial Programming Mode. For non-ISP applications,
SER_EN should be tied to VCC.
+3.3V (±10%).
Notes: 1. This pin has an internal 20 K⦠pull-up resistor.
6 AT17F32
3393CâCNFGâ6/05
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