T48C893 Datasheet, PDF (53/82 Pages) ATMEL Corporation – The multiple times programmable (MTP) version for the MARC4 ROM types

T48C893
4.3.4 Synchronous Serial Interface (SSI)
SSI Features:
2- and 3-wire NRZ
2-wire mode (I²C compatible)
(additional internal 2-wire link for multi-chip
packaging solutions)
D With Timer 2:
Biphase modulation
Manchester modulation
Pulse-width demodulation
Burst modulation
D With Timer 3:
Pulse-width modulation (PWM)
FSK modulation
Biphase demodulation
Manchester demodulation
Pulse-width demodulation
Pulse position Demodulation
SSI Peripheral Configuration
The synchronous serial interface (SSI) can be used either
for serial communication with external devices such as
EEPROMs, shift registers, display drivers, other
microcontrollers, or as a means for generating and
capturing on-chip serial streams of data. External data
communication takes place via the Port 4 (BP4)
multi-functional port which can be software configured
by writing the appropriate control word into the P4CR
register. The SSI can be configured in any one of the
following ways:
a) 2-wire external interface for bidirectional data
communication with one data terminal and one shift
clock. The SSI uses the Port BP43 as a bidirectional serial
data line (SD) and BP40 as shift clock line (SC).
b) 3-wire external interface for simultaneous input
and output of serial data, with a serial input data terminal
(SI), a serial output data terminal (SO) and a shift clock
(SC). The SSI uses BP40 as shift clock (SC), while the
serial data input (SI) is applied to BP43 (configured in
P4CR as input!). Serial output data (SO) in this case is
passed through to BP42 (configured in P4CR to T2O) via
the Timer 2 output stage (T2M2 configured in mode 6).
c) Timer/SSI combined modes – the SSI used
together with Timer 2 or Timer 3 is capable of performing
a variety of data modulation and demodulation functions
(see Timer Section). The modulating data is converted by
the SSI into a continuous serial stream of data which is in
turn modulated in one of the timer functional blocks.
Serial demodulated data can be serially captured in the
SSI and read by the controller. In the Timer 3 modes 10
and 11 (demodulation modes) the SSI can only be used as
demodulator.
d) Multi-chip link (MCL) – the SSI can also be used
as an interchip data interface for use in single package
multi–chip modules or hybrids. For such applications, the
SSI is provided with two dedicated pads (MCL_SD and
MCL_SC) which act as a two-wire chip-to-chip link. The
MCL can be activated by the MCL control bit. Should
these MCL pads be used by the SSI, the standard SD and
SC pins are not required and the corresponding Port 4
ports are available as conventional data ports.
Rev. A4, 22-Jan-02
53 (82)