T48C893 Datasheet, PDF (1/82 Pages) ATMEL Corporation – The multiple times programmable (MTP) version for the MARC4 ROM types

T48C893
Flash Version for M44C090/890 and M44C092/892
The T48C893 is the multiple times programmable (MTP) version for the MARC4 ROM types M44C090/890,
M44C092/892. The MTP is designed with EEPROM cells so it can be programmed several times. To offer full compati-
bility with each ROM version, the I/O configuration is stored into a separate internal EEPROM block during
programming.The configuration is download to the I/Os with every power-on reset..
Features / Benefits
D 4-Kbyte EEPROM program memory
D Wide supply voltage range (1.8 to 6.5 V)
D EEPROM programmable options
D Read protection for the EEPROM program memory
D 16 bidirectional I/Os
D Up to 7 external / internal interrupt sources
D 8 hardware and software interrupt priorities
D Very low sleep current (< 1 µA)
D 2 512 bit EEPROM data memory
D 256 4 bit RAM data memory
D Synchronous serial interface (2-wire, I²C, 3-wire)
D Multifunction timer/counter with prescaler/interval
timer
D Programmable system-clock with prescaler and five
different clock sources
D Watchdog, POR and brown-out function
D Voltage monitoring incl. Lo_BAT detect
D Multi-chip link for U3280M
VSS VDD
OSC1 OSC2
BP10
BP13
BP20/NTE
BP21
BP22
BP23
Brown-out protect.
RESET
Voltage monitor
External input
VMI
Port 1
RC
Crystal
External
oscillators oscillators clock input
Clock management
EEPROM RAM
4 K x 8 bit 256 x 4 bit
MARC4
4-bit CPU core
I/O bus
UTCM
Timer 1
interval- and
watchdog timer
Timer 2
T2I
8/12-bit timer T2O
with modulator
SD
SSI
SC
Serial interface
Timer 3
T3O
8-bit
timer / counter T3I
with modulator
and demodulator
Data direction +
alternate function
Port 4
Data direction +
interrupt control
Port 5
Data dir. +
alt. function
Port 6
EEPROM
2 32
16 bit
BP40 BP42
BP50 BP52
INT3 T2O _BP43 INT6 INT1
SC ^BP41 _INT3
BP51 BP53
VMI
SD
INT6 INT1
T2I
BP60
T3O
BP63
T3I
Figure 1. Block diagram T48C893
Rev. A4, 22-Jan-02
1 (82)