AT32UC3B0512_1 Datasheet, PDF (524/676 Pages) ATMEL Corporation – 32-bit AVR® Microcontroller

AT32UC3B
24.6 Functional Description
The PWM macrocell is primarily composed of a clock generator module and 7 channels.
– Clocked by the system clock, MCK, the clock generator module provides 13 clocks.
– Each channel can independently choose one of the clock generator outputs.
– Each channel generates an output waveform with attributes that can be defined
independently for each channel through the user interface registers.
24.6.1 PWM Clock Generator
Figure 24-2. Functional View of the Clock Generator Block Diagram
MCK ^{modulo n counter}
MCK
MCK/2
MCK/4
MCK/8
MCK/16
MCK/32
MCK/64
MCK/128
MCK/256
MCK/512
MCK/1024
32059I–06/2010
Divider A
clkA
PREA DIVA
PWM_MR
Divider B
clkB
PREB DIVB
PWM_MR
Caution: Before using the PWM macrocell, the programmer must ensure that the PWM clock in
the Power Manager is enabled.
The PWM macrocell master clock, MCK, is divided in the clock generator module to provide dif-
ferent clocks available for all channels. Each channel can independently select one of the
divided clocks.
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