AT80C51RD2_09 Datasheet, PDF (52/81 Pages) ATMEL Corporation – 80C51 High Performance ROM 8-bit Microcontroller

13. Keyboard Interface
The AT80C51RD2 implement a keyboard interface allowing the connection of a 8 x n matrix key-
board. It is based on 8 inputs with programmable interrupt capability on both high or low level.
These inputs are available as alternate function of P1 and allow to exit from idle and power-
down modes.
The keyboard interfaces with the C51 core through 3 special function registers: KBLS, the Key-
board Level Selection register (Table 13-3), KBE, The Keyboard Interrupt Enable register
(Table 13-2), and KBF, the Keyboard Flag register (Table 13-1).
13.0.1 Interrupt
The keyboard inputs are considered as 8 independent interrupt sources sharing the same inter-
rupt vector. An interrupt enable bit (KBD in IE1) allows global enable or disable of the keyboard
interrupt (see Figure 13-1). As detailed in Figure 13-2 each keyboard input has the capability to
detect a programmable level according to KBLS.x bit value. Level detection is then reported in
interrupt flags KBF.x that can be masked by software using KBE.x bits.
This structure allow keyboard arrangement from 1 x n to 8 x n matrix and allows usage of P1
inputs for other purpose.
Figure 13-1. Keyboard Interface Block Diagram
V_CC
P1:x
0
KBF.x
1
Internal Pull-up _KBLS.x
KBE.x
Figure 13-2. Keyboard Input Circuitry
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
KBD
IE1
KBDIT
Keyboard Interface
Interrupt Request
13.0.2
Power Reduction Mode
P1 inputs allow exit from idle and power-down modes as detailed in Section “Power-down
Mode”, page 56.
52 AT80C51RD2
4113D–8051–01/09