AT24C21_03 Datasheet, PDF (5/17 Pages) ATMEL Corporation – 2-wire Serial EEPROM

Functional
Description
Transmit-only Mode
(DDC1)
AT24C21
The AT24C21 has two modes of operation: the Transmit-only Mode and the Bidirec-
tional Mode. There is a separate 2-wire protocol to support each mode, each having a
separate clock input (SCL and VCLK) and both modes sharing a common Bidirectional
data line (SDA). The AT24C21 enters the Transmit-only Mode upon powering up the
device. In this mode, the device transmits data on the SDA pin upon a clock signal on
the VCLK pin. The device will remain in the Transmit-only Mode until a valid high-to-low
transition takes place on the SCL pin. The device will switch into the Bidirectional Mode
when a valid transition on the SCL pin is recognized. Once the device has transitioned
to the Bidirectional Mode, there is no way to return to the Transmit-only Mode, except to
power down (reset) the device.
The AT24C21 will power up in the Transmit-only Mode. In this mode, the device will out-
put one bit of data on the SDA pin on each rising edge on the VCLK pin. Data is
transmitted in 8 bit words with the most significant bit first. Each word is followed by a
9th “don't care” bit which will be in high impedance state (refer to Figure 1). The
AT24C21 will continuously cycle through the entire memory array in incremental
sequence as long a VCLK is present and no falling edges on SCL are received. When
the maximum address (7FH) is reached, the output will wrap around to the zero location
(00H) and continue. The Bidirectional mode clock (SCL) pin must be held high for the
device to remain in the Transmit-only mode.
Upon power-up, the AT24C21 will not output valid data until it has been initialized. Dur-
ing initialization, data will not be available until after the first nine clocks are sent to the
device (refer to Figure 2). The starting address for the Transmit-only mode can be deter-
mined during initialization. If the SDA pin is held high during the first eight clocks (refer
to Figure 2), the starting address will be 7FH. If the SDA pin is low during the first eight
clocks, the starting address will be 00H. During the ninth clock, SDA should be in high
impedance.
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0405I–SEEPR–7/03