AT91RM9200_05 Datasheet, PDF (475/683 Pages) ATMEL Corporation – ARM920T based Microcontroller

AT91RM9200
25.8.5 SSC Transmit Clock Mode Register
Register Name: SSC_TCMR
Access Type:
Read/Write
31
30
29
23
22
21
15
14
13
–
–
–
7
6
5
–
–
CKI
28
27
PERIOD
20
19
STTDLY
12
11
–
4
3
CKO
26
25
24
18
17
16
10
9
8
START
2
1
0
CKS
• CKS: Transmit Clock Selection
CKS
Selected Transmit Clock
0x0
Divided Clock
0x1
RK Clock signal
0x2
TK Pin
0x3
Reserved
• CKO: Transmit Clock Output Mode Selection
CKO
Transmit Clock Output Mode
0x0
None
0x1
Continuous Transmit Clock
0x2-0x7
Reserved
TK pin
Input-only
Output
• CKI: Transmit Clock Inversion
0: The data and the Frame Sync signal are shifted out on Transmit Clock falling edge.
1: The data and the Frame Sync signal are shifted out on Transmit Clock rising edge.
CKI affects only the Transmit Clock and not the output clock signal.
• START: Transmit Start Selection
START
Transmit Start
0x0
Continuous, as soon as a word is written in the SSC_THR Register (if Transmit is enabled) and
immediately after the end of transfer of the previous data.
0x1
Receive Start
0x2
Detection of a low level on TF signal
0x3
Detection of a high level on TF signal
0x4
Detection of a falling edge on TF signal
0x5
Detection of a rising edge on TF signal
0x6
Detection of any level change on TF signal
0x7
Detection of any edge on TF signal
0x8-0xF
Reserved
1768E–ATARM–30-Sep-05
475