AT91SAM7S128 Datasheet, PDF (473/495 Pages) ATMEL Corporation – THUMB BASED MICROCONTROLLERS

AT91SAM7S128 Preliminary
36. AT91SAM7S128 AC Characteristics
36.1 Applicable Conditions and Derating Data
These conditions and derating process apply to the following paragraphs: Clock Characteris-
tics, Embedded Flash Characteristics and JTAG/ICE Timings.
36.1.1
Conditions and Timings Computation
All delays are given as typical values under the following conditions:
• VDDIO = 3.3V
• VDDCORE = 1.8V
• Ambient Temperature = 25°C
• Load Capacitance = 0 pF
• The output level change detection is (0.5 x V_DDIO).
• The input level is 0.8V for a low-level detection and is 2.0V for a high-level detection.
The minimum and maximum values given in the AC characteristics tables of this datasheet
take into account process variation and design. In order to obtain the timing for other condi-
tions, the following equation should be used:
∑ ^t
=
δ_{T °}
×
⎛
⎝
(
δ_V
D
D
C
O
R
E
×
t_DATASHEET)
+
⎛
⎝
δ_V
D
D
I
O
×
(C_SIGNAL
×
δ_C
S
I
G
N
A
L
)⎠⎞
⎞
⎠
where:
• δ_T° is the derating factor in temperature given in Figure 36-1 on page 474.
• δ_VDDCORE is the derating factor for the Core Power Supply given in Figure 36-2 on page 474.
• t_DATASHEET is the minimum or maximum timing value given in this datasheet for a load
capacitance of 0 pF.
• δ_VDDIO is the derating factor for the IO Power Supply given in Figure 36-3 on page 475.
• C_SIGNAL is the capacitance load on the considered output pin⁽¹⁾.
• δ_CSIGNAL is the load derating factor depending on the capacitance load on the related output
pins given in Min and Max in this datasheet.
The input delays are given as typical values.
Note: The user must take into account the package capacitance load contribution (C_IN) described in
Table 35-2, “DC Characteristics,” on page 462.
6116A–ATARM–15-Apr-05
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