AT91SAM7S128 Datasheet, PDF (340/495 Pages) ATMEL Corporation – THUMB BASED MICROCONTROLLERS

30.8.1 SSC Control Register
Name:
SSC_CR
Access Type:
Write-only
31
30
29
28
27
–
–
–
–
–
23
22
21
20
19
–
–
–
–
–
15
14
13
12
11
SWRST
–
–
–
–
7
6
5
4
3
–
–
–
–
–
• RXEN: Receive Enable
0: No effect.
1: Enables Data Receive if RXDIS is not set.⁽¹⁾
• RXDIS: Receive Disable
0: No effect.
1: Disables Data Receive.⁽¹⁾
• TXEN: Transmit Enable
0: No effect.
1: Enables Data Transmit if TXDIS is not set.⁽¹⁾
• TXDIS: Transmit Disable
0: No effect.
1: Disables Data Transmit.⁽¹⁾
• SWRST: Software Reset
0: No effect.
1: Performs a software reset. Has priority on any other bit in SSC_CR.
Note: 1.
Only the data management is affected
26
25
24
–
–
–
18
17
16
–
–
–
10
9
8
–
TXDIS
TXEN
2
1
0
–
RXDIS
RXEN
340 AT91SAM7S128 Preliminary
6116A–ATARM–15-Apr-05