AT91SAM7S64-AI Datasheet, PDF (472/482 Pages) ATMEL Corporation – AT91 ARM THUMB BASED MICROCONTROLLERS

Clock Generator........................................................................................... 155
Description ...................................................................................................... 155
Slow Clock RC Oscillator ............................................................................. 155
Main Oscillator ............................................................................................. 155
Divider and PLL Block .................................................................................. 157
Power Management Controller (PMC) ....................................................... 158
Description ................................................................................................... 158
Master Clock Controller................................................................................ 158
Processor Clock Controller .......................................................................... 158
USB Clock Controller ................................................................................... 159
Peripheral Clock Controller .......................................................................... 159
Programmable Clock Output Controller ....................................................... 159
Programming Sequence .............................................................................. 160
Clock Switching Details ................................................................................ 163
Power Management Controller (PMC) User Interface ................................ 166
Debug Unit (DBGU) ..................................................................................... 179
Overview.......................................................................................................... 179
Block Diagram................................................................................................. 180
Product Dependencies................................................................................... 181
I/O Lines....................................................................................................... 181
Power Management ..................................................................................... 181
Interrupt Source ........................................................................................... 181
UART Operations............................................................................................ 181
Baud Rate Generator ................................................................................... 181
Receiver ....................................................................................................... 182
Transmitter ................................................................................................... 184
Peripheral Data Controller............................................................................ 185
Test Modes .................................................................................................. 185
Debug Communication Channel Support..................................................... 186
Chip Identifier ............................................................................................... 187
ICE Access Prevention ................................................................................ 187
Debug Unit User Interface ............................................................................. 188
Debug Unit Control Register ........................................................................ 189
Debug Unit Mode Register ........................................................................... 190
Debug Unit Interrupt Enable Register .......................................................... 191
Debug Unit Interrupt Disable Register ......................................................... 192
Debug Unit Interrupt Mask Register ............................................................. 193
Debug Unit Status Register.......................................................................... 194
Debug Unit Receiver Holding Register ........................................................ 196
Debug Unit Transmit Holding Register......................................................... 197
Debug Unit Baud Rate Generator Register.................................................. 197
Debug Unit Chip ID Register........................................................................ 198
vi AT91SAM7S64 Preliminary
6070A–ATARM–28-Oct-04