ATTINY48_14 Datasheet, PDF (45/302 Pages) ATMEL Corporation – High Performance, Low Power AVR

ATtiny48/88
8.2.4
Watchdog Reset
When the Watchdog times out, it will generate a short reset pulse of one CK cycle duration. On
the falling edge of this pulse, the delay timer starts counting the Time-out period t_TOUT. Refer to
page 46 for details on operation of the Watchdog Timer.
Figure 8-6. Watchdog System Reset During Operation
CC
CK
8.3 Internal Voltage Reference
ATtiny48/88 features an internal bandgap reference. This reference is used for Brown-out
Detection, and it can be used as an input to the Analog Comparator or the ADC.
8.3.1
Voltage Reference Enable Signals and Start-up Time
The voltage reference has a start-up time that may influence the way it should be used. The
start-up time is given in “System and Reset Characterizations” on page 209. To save power, the
reference is not always turned on. The reference is on during the following situations:
1. When the BOD is enabled (by programming the BODLEVEL[2:0] Fuses).
2. When the internal reference is connected to the Analog Comparator (by setting the
ACBG bit in ACSR).
3. When the ADC is enabled.
Thus, when the BOD is not enabled, after setting the ACBG bit or enabling the ADC, the user
must always allow the reference to start up before the output from the Analog Comparator or
ADC is used. To reduce power consumption in Power-down mode, the user can avoid the three
conditions above to ensure that the reference is turned off before entering Power-down mode.
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8008H–AVR–04/11