AT32AP7000_14 Datasheet, PDF (45/63 Pages) ATMEL Corporation – High Performance, Low Power AVR32 32-Bit Microcontroller

AT32AP7000
Before a PWM period has elapsed, the read channel status may be wrong. The CHIDx-bit
for a PWM channel in the PWM Enable Register will read '1' for one full PWM period even if
the channel was disabled before the period elapsed. It will then read '0' as expected.
Fix/Workaround
Reading the PWM channel status of a disabled channel is only correct after a PWM period
14. TWI transfer error without ACK
If the TWI does not receive an ACK from a slave during the address+R/W phase, no bits in
the status register will be set to indicate this. Hence, the transfer will never complete.
Fix/Workaround
To prevent errors due to missing ACK, the software should use a timeout mechanism to ter-
minate the transfer if this happens.
15. SSC can not transmit or receive data
The SSC can not transmit or receive data when CKS = CKDIV and CKO = none in TCMR or
RCMR respectively.
Fix/Workaround
Set CKO to a value that is not "None" and enable the PIO with output driver disabled on the
TK/RK pin.
16. USART - RXBREAK flag is not correctly handled
The FRAME_ERROR is set instead of the RXBREAK when the break character is located
just after the STOP BIT(S) in ASYNCHRONOUS mode.
Fix/Workaround
The transmitting UART must set timeguard greater than 0.
17. USART - Manchester encoding/decoding is not working.
Manchester encoding/decoding is not working.
Fix/Workaround
Do not use manchester encoding.
18. SPI - Disabling SPI has no effect on TDRE flag.
Disabling SPI has no effect on TDRE whereas the write data command is filtered when SPI
is disabled. This means that as soon as the SPI is disabled it becomes impossible to reset
the TDRE flag by writing in the SPI_TDR. So if the SPI is disabled during a PDC transfer, the
PDC will continue to write data in the SPI_TDR (as TDRE keeps High) till its buffer is empty,
and all data written after the disable command is lost.
Fix/Workaround
Disable PDC, 2 NOP (minimum), Disable SPI. When you want to continue the transfer:
Enable SPI, Enable PDC.
19. SPI disable does not work in SLAVE mode.
SPI disable does not work in SLAVE mode.
Fix/Workaround
Read the last received data, then perform a Software Reset.
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32003MS–AVR32–09/09