AT32AP7000_14 Datasheet, PDF (43/63 Pages) ATMEL Corporation – High Performance, Low Power AVR32 32-Bit Microcontroller

10. Errata
10.1 Rev. C
32003MS–AVR32–09/09
AT32AP7000
1. SPI FDIV option does not work
Selecting clock signal using FDIV = 1 does not work as specified.
Fix/Workaround
Do not set FDIV = 1.
2. SPI Chip Select 0 BITS field overrides other Chip Selects
The BITS field for Chip Select 0 overrides BITS fields for other Chip selects.
Fix/Workaround
Update Chip Select 0 BITS field to the relevant settings before transmitting with Chip Selects
other than 0.
3. SPI LASTXFER may be overwritten
When Peripheral Select (PS) = 0, the LASTXFER-bit in the Transmit Data Register (TDR)
should be internally discared. This fails and may cause problems during DMA transfers.
Transmitting data using the PDC when PS=0, the size of the transferred data is 8- or 16-bits.
The upper 16 bits of the TDR will be written to a random value. If Chip Select Active After
Transfer (CSAAT) = 1, the behavior of the Chip Select will be unpredictable.
Fix/Workaround
- Do not use CSAAT = 1 if PS = 0
- Use GPIO to control Chip Select lines
- Select PS=1 and store data for PCS and LASTXFER for each data in transmit buffer.
4. SPI LASTXFER overrides Chip Select
The LASTXFER bit overrides Chip Select input when PS = 0 and CSAAT is used.
Fix/Workaround
- Do not use the CSAAT
- Use GPIO as Chip Select input
- Select PS = 1. Transfer 32-bit with correct LASTXFER settings.
5. MMC data write operation with less than 12 bytes is impossible.
MCI data write operation with less than 12 bytes is impossible. The Data Write operation
with a number of bytes less than 12 leaves the internal MCI FIFO in an inconsistent state.
Subsequent reads and writes will not function properly.
Fix/Workaround
Always transfer 12 or more bytes at a time. If less than 12 bytes are transferred, the only
recovery mechanism is to perform a software reset of the MCI.
6. MMC SDIO interrupt only works for slot A
If 1-bit data bus width and on other slots than slot A, the SDIO interrupt can not be cap-
tured.
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