AT91CAP7S450A_1 Datasheet, PDF (430/517 Pages) ATMEL Corporation – Customizable Microcontroller

1. The microcontroller sets the FORCESTALL flag in the UDP_ CSRx endpoint’s register.
2. The host receives the stall packet.
3. The microcontroller is notified that the device has sent the stall by polling the
STALLSENT to be set. An endpoint interrupt is pending while STALLSENT is set. The
microcontroller must clear STALLSENT to clear the interrupt.
When a setup transaction is received after a stall handshake, STALLSENT must be cleared in
order to prevent interrupts due to STALLSENT being set.
Figure 31-11. Stall Handshake (Data IN Transfer)
USB Bus
Packets
Data IN PID
Stall PID
FORCESTALL
STALLSENT
Cleared by Firmware
Set by Firmware
Interrupt Pending
Cleared by Firmware
Set by
USB Device
Figure 31-12. Stall Handshake (Data OUT Transfer)
USB Bus
Packets
Data OUT PID
Data OUT
Stall PID
FORCESTALL
STALLSENT
Set by Firmware
Interrupt Pending
Set by USB Device
Cleared by Firmware
430 AT91CAP7S450A [Preliminary]
5119D–CAP–05/09