AT91CAP7S450A_1 Datasheet, PDF (220/517 Pages) ATMEL Corporation – Customizable Microcontroller

24.2.10.4 PMC Peripheral Clock Enable Register
Register Name:
PMC_PCER
Access Type:
Write-only
31
30
29
28
27
26
-
-
HCK3(PID29) HCK2(PID28) HCK1(PID27) HCK0(PID26)
23
PID23
22
PID22
21
PID21
20
PID20
19
PID19
18
PID18
15
PID15
14
PID14
13
PID13
12
PID12
11
PID11
10
PID10
7
PID7
6
PID6
5
PID5
4
PID4
3
PID3
2
PID2
25
PID25
17
PID17
9
PID9
1
-
24
PID24
16
PID16
8
PID8
0
-
• PIDx: Peripheral Clock x Enable
0 = No effect.
1 = Enables the corresponding peripheral clock.
Note: PID2 to PID29 refer to identifiers as defined in Section 10.2 Peripheral Identifiers.
Note: Programming the control bits of the Peripheral ID that are not implemented has no effect on the behavior of the PMC.
• HCKx: HClock x Output Enable
0 = No effect.
1 = Enables the corresponding HClock output.
Note: HCK0 - HCK3 correspond to PID26 - PID29 and therefore control the AHB clocks for the MP Block Master A, B, C, and D
respectively as defined in Section 10.2 Peripheral Identifiers.
220 AT91CAP7S450A [Preliminary]
5119D–CAP–05/09