U3741BM Datasheet, PDF (4/32 Pages) ATMEL Corporation – UHF ASK RECEIVER IC

RF Front End
The RF front end of the receiver is a heterodyne configuration that converts the input
signal into a 1-MHz IF signal. According to the block diagram, the front end consists of
an LNA (low noise amplifier), LO (local oscillator), a mixer and RF amplifier.
The LO generates the carrier frequency for the mixer via a PLL synthesizer. The XTO
(crystal oscillator) generates the reference frequency f_XTO. The VCO (voltage-controlled
oscillator) generates the drive voltage frequency f_LO for the mixer. f_LO is dependent on
the voltage at pin LF. f_LO is divided by a factor of 64. The divided frequency is compared
to f_XTO by the phase frequency detector. The current output of the phase frequency
detector is connected to a passive loop filter and thereby generates the control voltage
V_LF for the VCO. By means of that configuration, V_LF is controlled in a way that f_LO/64 is
equal to f_XTO. If f_LO is determined, f_XTO can be calculated using the following formula:
f_XTO
=
-^f-^L---^O--
64
The XTO is a one-pin oscillator that operates at the series resonance of the quartz crys-
tal. According to Figure 2, the crystal should be connected to GND via a capacitor CL.
The value of that capacitor is recommended by the crystal supplier. The value of CL
should be optimized for the individual board layout to achieve the exact value of f_XTO and
hereby of f_LO. When designing the system in terms of receiving bandwidth, the accuracy
of the crystal and XTO must be considered.
Figure 2. PLL Peripherals
V_S
DVCC
C_L
XTO
LFGND
LF
R1 = 820 Ω
C9 = 4.7 nF
C10 = 1 nF
V_S
LFVCC
R1
C10
C9
The passive loop filter connected to pin LF is designed for a loop bandwidth of
B_Loop = 100 kHz. This value for B_Loop exhibits the best possible noise performance of the
LO. Figure 2 shows the appropriate loop filter components to achieve the desired loop
bandwidth. If the filter components are changed for any reason, please note that the
maximum capacitive load at pin LF is limited. If the capacitive load is exceeded, a bit
check may no longer be possible since f_LO cannot settle in time before the bit check
starts to evaluate the incoming data stream. Therefore, self polling also does not work in
that case.
f_LO is determined by the RF input frequency f_RF and the IF frequency f_IF using the follow-
ing formula:
f_LO = f_RF – f_IF
4 U3741BM
4662B–RKE–10/04