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AT91CAP9SC500A Datasheet, PDF (38/60 Pages) ATMEL Corporation – Customizable Microcontroller Processor | |||
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⢠Two-pin UART
â Implemented features are 100% compatible with the standard Atmel USART
â Independent receiver and transmitter with a common programmable Baud Rate
Generator
â Even, Odd, Mark or Space Parity Generation
â Parity, Framing and Overrun Error Detection
â Automatic Echo, Local Loopback and Remote Loopback Channel Modes
â Support for two PDC channels with connection to receiver and transmitter
⢠Debug Communication Channel Support
â Offers visibility of and interrupt trigger from COMMRX and COMMTX signals from
the ARM Processorâs ICE Interface
9.12
Chip Identification
⢠Chip ID: 0x039A03A0
⢠JTAG ID: 0x05B1B03F
⢠ARM926 TAP ID: 0x0792603F
9.13
PIO Controllers
⢠4 PIO Controllers, PIOA to PIOD, controlling a total of 128 I/O Lines
⢠Each PIO Controller controls up to 32 programmable I/O Lines
â PIOA has 32 I/O Lines
â PIOB has 32 I/O Lines
â PIOC has 32 I/O Lines
â PIOD has 32 I/O Lines
⢠Fully programmable through Set/Clear Registers
⢠Multiplexing of two peripheral functions per I/O Line
⢠For each I/O Line (whether assigned to a peripheral or used as general purpose I/O)
â Input change interrupt
â Glitch filter
â Multi-drive option enables driving in open drain
â Programmable pull up on each I/O line
â Pin data status register, supplies visibility of the level on the pin at any time
⢠Synchronous output, provides Set and Clear of several I/O lines in a single write
38 AT91CAP9SC500A/AT91CAP9SC250A Preliminary
6270ASâCAPâ10-Jan-08
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