AT91SAM7S32 Datasheet, PDF (378/446 Pages) ATMEL Corporation – AT91 ARM THUMB BASED MICROCONTROLLERS

PWM User Interface
PWM Register Mapping
Table 79. PWM Controller Registers
Offset
Register
Name
Access
0x00
PWM Mode Register
PWM_MR
Read/Write
0x04
PWM Enable Register
PWM_ENA
Write-only
0x08
PWM Disable Register
PWM_DIS
Write-only
0x0C
PWM Status Register
PWM_SR
Read-only
0x10
PWM Interrupt Enable Register
PWM_IER
Write-only
0x14
PWM Interrupt Disable Register
PWM_IDR
Write-only
0x18
PWM Interrupt Mask Register
PWM_IMR
Read-only
0x1C
PWM Interrupt Status Register
PWM_ISR
Read-only
0x4C - 0xF8
Reserved
–
–
0xFC
Version Register
PWM_VERSION
Read-only
0x100 - 0x1FC
Reserved
0x200
Channel 0 Mode Register
PWM_CMR0
Read/Write
0x204
Channel 0 Duty Cycle Register
PWM_CDTY0
Read/Write
0x208
Channel 0 Period Register
PWM_CPRD0
Read/Write
0x20C
Channel 0 Counter Register
PWM_CCNT0
Read-only
0x210
Channel 0 Update Register
PWM_CUPD0
Write-only
...
Reserved
0x220
Channel 1 Mode Register
PWM_CMR1
Read/Write
0x224
Channel 1 Duty Cycle Register
PWM_CDTY1
Read/Write
0x228
Channel 1 Period Register
PWM_CPRD1
Read/Write
0x22C
Channel 1 Counter Register
PWM_CCNT1
Read-only
0x230
Channel 1 Update Register
PWM_CUPD1
Write-only
...
...
...
...
Note: 1. Values in the Version Register vary with the version of the IP block implementation.
Peripheral
Reset Value
0
-
-
0
-
-
0
0
–
0x- ⁽¹⁾
0x0
0x0
0x0
0x0
-
0x0
0x0
0x0
0x0
-
...
378 AT91SAM7S32 Preliminary
6071A–ATARM–28-Oct-04