AT91SAM7S32 Datasheet, PDF (25/446 Pages) ATMEL Corporation – AT91 ARM THUMB BASED MICROCONTROLLERS

Two-wire Interface
USART
Serial Synchronous
Controller
Timer Counter
6071A–ATARM–28-Oct-04
AT91SAM7S32 Preliminary
• Master Mode only
• Compatibility with standard two-wire serial memories
• One, two or three bytes for slave address
• Sequential read/write operations
• Programmable Baud Rate Generator
• 5- to 9-bit full-duplex synchronous or asynchronous serial communications
– 1, 1.5 or 2 stop bits in Asynchronous Mode
– 1 or 2 stop bits in Synchronous Mode
– Parity generation and error detection
– Framing error detection, overrun error detection
– MSB or LSB first
– Optional break generation and detection
– By 8 or by 16 over-sampling receiver frequency
– Hardware handshaking RTS - CTS
– Receiver time-out and transmitter timeguard
– Multi-drop Mode with address generation and detection
• RS485 with driver control signal
• ISO7816, T = 0 or T = 1 Protocols for interfacing with smart cards
– NACK handling, error counter with repetition and iteration limit
• IrDA modulation and demodulation
– Communication at up to 115.2 Kbps
• Test Modes
– Remote Loopback, Local Loopback, Automatic Echo
• Provides serial synchronous communication links used in audio and telecom
applications
• Contains an independent receiver and transmitter and a common clock divider
• Offers a configurable frame sync and data length
• Receiver and transmitter can be programmed to start automatically or on detection
of different event on the frame sync signal
• Receiver and transmitter include a data signal, a clock signal and a frame
synchronization signal
• Three 16-bit Timer Counter Channels
– Three output compare or two input capture
• Wide range of functions including:
– Frequency measurement
– Event counting
– Interval measurement
– Pulse generation
– Delay timing
– Pulse Width Modulation
– Up/down capabilities
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