AT90PWM81 Datasheet, PDF (36/325 Pages) ATMEL Corporation – 8-bit AVR Microcontroller with 8K Bytes In- System Programmable Flash

5.3.4
5.3.5
5.3.6
36
When ‘Enable/Disable Clock Source’, ‘Request for Clock Availability’ or ‘Clock Source Switching’ com-
mand is entered, the selected configuration provided by the CLKSELR register is latched for each targeted
clock source.
‘Recover System Clock Source’ command enables the code recovering of clock source used to drive the
system clock. The CKSEL field of CLKSELR register is then updated with this code. There is no informa-
tion on the SUT used or status on CKOUT.
Because the selected configuration is latched at clock source level, it is possible to enable many clock
sources at a given time (ex: the internal RC oscillator for system clock + an oscillator with external crys-
tal). The user’s software has the responsibility of this management.
‘Request for Clock Availability’ command returns the working order of the clock source addressed. The
status is set in the CLKRDY bit of CLKCSR register
Enable/Disable Clock Source
‘Enable Clock Source’ command selects and enables the clock source provided by the setting of CLK-
SELR register (CSEL3..0 and CSUT1:0). CSEL field will select the clock source and CSUT field will
select the start-up time (as CKSEL and SUT fuse bits do it). To be sure that a clock source has been
enabled, it will be better to perform a ‘Request for Clock Availability’ command after the ‘Enable Clock
Source’ command.
‘Disable Clock Source’ command disables the clock source provided by the setting of CLKSELR register
(only CSEL3..0). If the clock source is the one that is used to drive the system clock, the command is not
taken into account.
Clock Availability
‘Request for Clock Availability’ command enables an oscillation-counting of the selected source clock,
CSEL3..0. The count is provided by CSUT1..0. The clock is declared ready (CLKRDY = 1) when the
count is finished. This flag remains unchanged up to a new count. The CLKRDY flag is reset when the
count starts. To perform this checking, the CKSEL and CSUT fields should not change all long the opera-
tion is running.
Two usages are possible:
1. Clock stability before switching
Once the new clock source is selected, the count procedure is running. The user (code) should
wait for the setting of the CLKRDY flag in CLKSCR register before to perform a switching.
2. Clock available on request
AT any time, the user (code) can ask for the availability of a clock source. The user (code) can
request it writing the appropriate command in the CLKSCR register. A full status on clock
sources then can be done.
Clock Switching
To drive the system clock, the user can switch from the current clock source to the following ones (one of
them is the current clock source):
1. Calibrated internal RC oscillator 8.0/1.0 MHz,
2. Internal watchdog oscillator 128 kHz,
3. External clock,
4. External Crystal/Ceramic Resonator
5. PLL output divided by four.
The clock switching is performed in a sequence of commands. First, the user (code) must make sure that
the new clock source is running. Then the switching command can be entered. At the end, the user (code)
AT90PWM81
7734P–AVR–08/10