AT90PWM81 Datasheet, PDF (220/325 Pages) ATMEL Corporation – 8-bit AVR Microcontroller with 8K Bytes In- System Programmable Flash

In case of trig on PSCnASY event, there is no flag. So, if ADSSEN is reset, a conversion will start each
time the trig event appears and the previous conversion is completed ..
Table 17-6.
ADTS3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
ADC Auto Trigger Source Selection
ADTS2
ADTS1
ADTS0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Description
Free Running Mode
Analog Comparator 1
External Interrupt Request 0
Timer/Counter1 Overflow
Timer/Counter1 Capture Event
PSCRASY Event
PSC2ASY Event
Analog comparator 2
Analog comparator 3
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
17.8.4
ADC Result Data Registers – ADCH and ADCL
When an ADC conversion is complete, the conversion results are stored in these two result data registers.
When the ADCL register is read, the two ADC result data registers can’t be updated until the ADCH reg-
ister has also been read.
Consequently, in 10-bit configuration, the ADCL register must be read first before the ADCH.
Nevertheless, to work easily with only 8-bit precision, there is the possibility to left adjust the result
thanks to the ADLAR bit in the ADCSRA register. Like this, it is sufficient to only read ADCH to have
the conversion result.
17.8.4.1
ADLAR = 0
Bit
Read/Write
Initial Value
7
-
ADC7
R
R
0
0
6
-
ADC6
R
R
0
0
5
-
ADC5
R
R
0
0
4
-
ADC4
R
R
0
0
3
-
ADC3
R
R
0
0
2
-
ADC2
R
R
0
0
1
ADC9
ADC1
R
R
0
0
0
ADC8
ADC0
R
R
0
0
ADCH
ADCL
220 AT90PWM81
7734P–AVR–08/10