ATMEGA48P_11 Datasheet, PDF (306/420 Pages) ATMEL Corporation – 131 Powerful Instructions - Most Single Clock Cycle Execution

not used, the used must wait at least t_{WD_EEPROM} before issuing the next byte (See Table
28-16). In a chip erased device, no 0xFF in the data file(s) need to be programmed.
6. Any memory location can be verified by using the Read instruction which returns the con-
tent at the selected address at serial output MISO.
7. At the end of the programming session, RESET can be set high to commence normal
operation.
8. Power-off sequence (if needed):
Set RESET to “1”.
Turn V_CC power off.
Table 28-16. Typical Wait Delay Before Writing the Next Flash or EEPROM Location
Symbol
Minimum Wait Delay
t_{WD_FLASH}
t_{WD_EEPROM}
t_{WD_ERASE}
4.5 ms
3.6 ms
9.0 ms
28.8.3
Serial Programming Instruction set
Table 28-17 on page 306 and Figure 28-8 on page 308 describes the Instruction set.
Table 28-17. Serial Programming Instruction Set (Hexadecimal values)
Instruction Format
Instruction/Operation
Byte 1
Byte 2
Byte 3
Programming Enable
$AC
$53
$00
Chip Erase (Program Memory/EEPROM)
$AC
$80
$00
Poll RDY/BSY
$F0
$00
$00
Load Instructions
Load Extended Address byte⁽¹⁾
$4D
$00
Extended adr
Load Program Memory Page, High byte
$48
$00
adr LSB
Load Program Memory Page, Low byte
$40
$00
adr LSB
Load EEPROM Memory Page (page access)
$C1
$00
0000 000aa
Read Instructions
Read Program Memory, High byte
$28
adr MSB
adr LSB
Read Program Memory, Low byte
$20
adr MSB
adr LSB
Read EEPROM Memory
$A0
0000 00aa
aaaa aaaa
Read Lock bits
$58
$00
$00
Read Signature Byte
$30
$00
0000 000aa
Read Fuse bits
$50
$00
$00
Read Fuse High bits
$58
$08
$00
Read Extended Fuse Bits
$50
$08
$00
Read Calibration Byte
$38
$00
$00
Byte4
$00
$00
data byte out
$00
high data byte in
low data byte in
data byte in
high data byte out
low data byte out
data byte out
data byte out
data byte out
data byte out
data byte out
data byte out
data byte out
306 ATmega48P/88P/168P
8025M–AVR–6/11