ATMEGA32U6 Datasheet, PDF (29/459 Pages) ATMEL Corporation – 8-bit Microcontroller with 64/128K Bytes of ISP Flash and USB Controller

ATmega32U6/AT90USB64/128
5.4 I/O Memory
The I/O space definition of the ATmega32U6/AT90USB64/128 is shown in “Register Summary”
on page 429.
All ATmega32U6/AT90USB64/128 I/Os and peripherals are placed in the I/O space. All I/O loca-
tions may be accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data
between the 32 general purpose working registers and the I/O space. I/O Registers within the
address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In
these registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
Refer to the instruction set section for more details. When using the I/O specific commands IN
and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data
space using LD and ST instructions, 0x20 must be added to these addresses. The
ATmega32U6/AT90USB64/128 is a complex microcontroller with more peripheral units than can
be supported within the 64 location reserved in Opcode for the IN and OUT instructions. For the
Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instruc-
tions can be used.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most
other AVRs, the CBI and SBI instructions will only operate on the specified bit, and can therefore
be used on registers containing such Status Flags. The CBI and SBI instructions work with reg-
isters 0x00 to 0x1F only.
The I/O and peripherals control registers are explained in later sections.
5.4.1
General Purpose I/O Registers
The ATmega32U6/AT90USB64/128 contains three General Purpose I/O Registers. These reg-
isters can be used for storing any information, and they are particularly useful for storing global
variables and Status Flags. General Purpose I/O Registers within the address range 0x00 -
0x1F are directly bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.
5.4.2
General Purpose I/O Register 2 – GPIOR2
Bit
7
6
5
MSB
Read/Write
R/W
R/W
R/W
Initial Value
0
0
0
4
3
R/W
R/W
0
0
2
1
0
LSB
GPIOR2
R/W
R/W
R/W
0
0
0
5.4.3
General Purpose I/O Register 1 – GPIOR1
Bit
7
6
5
MSB
Read/Write
R/W
R/W
R/W
Initial Value
0
0
0
4
3
R/W
R/W
0
0
2
1
0
LSB
GPIOR1
R/W
R/W
R/W
0
0
0
5.4.4
General Purpose I/O Register 0 – GPIOR0
Bit
7
6
5
MSB
Read/Write
R/W
R/W
R/W
Initial Value
0
0
0
4
3
R/W
R/W
0
0
2
1
0
LSB
GPIOR0
R/W
R/W
R/W
0
0
0
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