ATA5771_10 Datasheet, PDF (29/219 Pages) ATMEL Corporation – Output Power of 8dBm at 315MHz / 7.5dBm at 433.92 MHz / 5.5dBm at 868.3MHz

Atmel ATA5771/73/74
4.8.5 Register Description
4.8.5.1
EEARH – EEPROM Address Register
Bit
7
6
5
4
3
2
1
0
0x1F (0x3F)
–
–
–
–
–
–
–
EEAR8
EEARH
Read/Write
R
R
R
R
R
R
R
R/W
Initial Value
0
0
0
0
0
0
0
X
• Bits 7..1 – Res: Reserved Bits
These bits are reserved bits in the Atmel^® ATtiny44V and will always read as zero.
• Bit 0 – EEAR8: EEPROM Address
This bit is reserved bit and will always read as zero. The initial value of EEAR is undefined. A
proper value must be written before the EEPROM may be accessed.
4.8.5.2
EEARL – EEPROM Address Register
Bit
0x1E (0x3E)
Read/Write
Initial Value
7
EEAR7
R/W
X
6
EEAR6
R/W
X
5
EEAR5
R/W
X
4
EEAR4
R/W
X
3
EEAR3
R/W
X
2
EEAR2
R/W
X
1
EEAR1
R/W
X
0
EEAR0
R/W
X
EEARL
• Bits 7..0 – EEAR7..0: EEPROM Address
The EEPROM Address Register – EEARL – specifies the EEPROM address. The EEPROM
data bytes are addressed linearly between 0 and 256. The initial value of EEAR is undefined.
A proper value must be written before the EEPROM may be accessed.
4.8.5.3
EEDR – EEPROM Data Register
Bit
0x1D (0x3D)
Read/Write
Initial Value
7
EEDR7
R/W
0
6
EEDR6
R/W
0
5
EEDR5
R/W
0
4
EEDR4
R/W
0
3
EEDR3
R/W
0
2
EEDR2
R/W
0
1
EEDR1
R/W
0
0
EEDR0
R/W
0
EEDR
• Bits 7..0 – EEDR7..0: EEPROM Data
For the EEPROM write operation the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
4.8.5.4
EECR – EEPROM Control Register
Bit
7
0x1C (0x3C)
–
Read/Write
R
Initial Value
0
6
5
4
3
2
1
0
–
EEPM1 EEPM0 EERIE EEMPE EEPE
EERE
EECR
R
R/W
R/W
R/W
R/W
R/W
R/W
0
X
X
0
0
X
0
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