ATMEGA32A_1 Datasheet, PDF (280/352 Pages) ATMEL Corporation – 8-bit Microcontroller with 32K Bytes In-System Programmable Flash

26.9 SPI Serial Programming Pin Mapping
Table 26-12. Pin Mapping SPI Serial Programming
Symbol
Pins
I/O
MOSI
PB5
I
MISO
PB6
O
SCK
PB7
I
Description
Serial Data in
Serial Data out
Serial Clock
Figure 26-10. SPI Serial Programming and Verify⁽¹⁾
+2.7 - 5.5V
MOSI
PB5
MISO
PB6
SCK
PB7
VCC
+2.7 - 5.5V⁽²⁾
AVCC
XTAL1
RESET
GND
26.9.1
Notes: 1. If the device is clocked by the Internal Oscillator, it is no need to connect a clock source to the
XTAL1 pin.
2. V_CC -0.3V < AVCC < V_CC +0.3V, however, AVCC should always be within 2.7 - 5.5V
When programming the EEPROM, an auto-erase cycle is built into the self-timed programming
operation (in the serial mode ONLY) and there is no need to first execute the Chip Erase instruc-
tion. The Chip Erase operation turns the content of every memory location in both the Program
and EEPROM arrays into $FF.
Depending on CKSEL Fuses, a valid clock must be present. The minimum low and high periods
for the serial clock (SCK) input are defined as follows:
Low: > 2 CPU clock cycles for f_ck < 12 MHz, 3 CPU clock cycles for f_ck ≥ 12 MHz
High: > 2 CPU clock cycles for f_ck < 12 MHz, 3 CPU clock cycles for f_ck ≥ 12 MHz
SPI Serial Programming Algorithm
When writing serial data to the ATmega32A, data is clocked on the rising edge of SCK.
When reading data from the ATmega32A, data is clocked on the falling edge of SCK. See Figure
26-11 for timing details.
To program and verify the ATmega32A in the SPI Serial Programming mode, the following
sequence is recommended (See four byte instruction formats in Table 26-14):
280 ATmega32A
8155B–AVR–07/09