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AT91CAP7E Datasheet, PDF (275/520 Pages) ATMEL Corporation – Customizable Microcontroller | |||
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AT91CAP7E
26.6.1 Debug Unit Control Register
Name:
DBGU_CR
Access Type:
Write-only
31
30
29
28
â
â
â
â
23
22
21
20
â
â
â
â
15
14
13
12
â
â
â
â
7
TXDIS
6
TXEN
5
RXDIS
4
RXEN
27
â
19
â
11
â
3
RSTTX
26
â
18
â
10
â
2
RSTRX
25
24
â
â
17
16
â
â
9
8
â
RSTSTA
1
0
â
â
⢠RSTRX: Reset Receiver
0 = No effect.
1 = The receiver logic is reset and disabled. If a character is being received, the reception is aborted.
⢠RSTTX: Reset Transmitter
0 = No effect.
1 = The transmitter logic is reset and disabled. If a character is being transmitted, the transmission is aborted.
⢠RXEN: Receiver Enable
0 = No effect.
1 = The receiver is enabled if RXDIS is 0.
⢠RXDIS: Receiver Disable
0 = No effect.
1 = The receiver is disabled. If a character is being processed and RSTRX is not set, the character is completed before the
receiver is stopped.
⢠TXEN: Transmitter Enable
0 = No effect.
1 = The transmitter is enabled if TXDIS is 0.
⢠TXDIS: Transmitter Disable
0 = No effect.
1 = The transmitter is disabled. If a character is being processed and a character has been written the DBGU_THR and
RSTTX is not set, both characters are completed before the transmitter is stopped.
⢠RSTSTA: Reset Status Bits
0 = No effect.
1 = Resets the status bits PARE, FRAME and OVRE in the DBGU_SR.
8549AâCAPâ10/08
275
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