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AT91CAP7E Datasheet, PDF (1/520 Pages) ATMEL Corporation – Customizable Microcontroller
Features
• Incorporates the ARM7TDMI® ARM® Thumb® Processor
– 72 MIPS at 80MHz
– EmbeddedICE™ In-circuit Emulation, Debug Communication Channel Support
• Additional Embedded Memories
– One 256 Kbyte Internal ROM, Single-cycle Access at Maximum Matrix Speed
– 160 Kbytes of Internal SRAM, Single-cycle Access at Maximum Processor or
Matrix Speed (Configured in blocks of 96 KB and 64 KB with separate AHB slaves)
• External Bus Interface (EBI)
– Supports SDRAM, Static Memory, NAND Flash/SmartMedia® and CompactFlash®
• USB 2.0 Full Speed (12 Mbits per second) Device Port
– On-chip Transceiver, 2,432-byte Configurable Integrated DPRAM
• FPGA Interface
– High Connectivity for up to 2 AHB Masters and 4 dedicated/16 muxed Slaves
• 10-bit Analog to Digital Converter (ADC)
– Up to 8 multiplexed channels
– 440 kSample / s
• Bus Matrix
– Four-layer, 32-bit Matrix
• Fully-featured System Controller, including
– Reset Controller, Shut Down Controller
– Twenty 32-bit Battery Backup Registers for a Total of 80 Bytes
– Clock Generator
– Advanced Power Management Controller (APMC)
– Advanced Interrupt Controller and Debug Unit
– Periodic Interval Timer, Watchdog Timer and Real-Time Timer
• Boot Mode Select Option and Remap Command
• Reset Controller
– Based on Two Power-on Reset Cells, Reset Source Identification and Reset Output
Control
• Shut Down Controller
– Programmable Shutdown Pin Control and Wake-up Circuitry
• Clock Generator (CKGR)
– 32768Hz Low-power Oscillator on Battery Backup Power Supply, Providing a
Permanent Slow Clock
– Internal 32kHz RC oscillator for fast start-up
– 8 to 16 MHz On-chip Oscillator, 50 to 100 MHz PLL, and 80 to 240 MHz PLL
• Advanced Power Management Controller (APMC)
– Very Slow Clock Operating Mode, Software Programmable Power Optimization
Capabilities
– Four Programmable External Clock Output Signals
• Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Two External Interrupt Sources and one Fast Interrupt Source, Spurious interrupt
protected
• Debug Unit (DBGU)
– 2-wire UART and Support for Debug Communication Channel, Programmable ICE
Access Prevention
Customizable
Microcontroller
AT91CAP7E
Preliminary
8549A–CAP–10/08