TSC80251G2D Datasheet, PDF (27/76 Pages) ATMEL Corporation – B/16-BIT MICROCONTROLLER WITH SERIAL COMMUNICATION INTERFACES

AT/TSC8x251G2D
Logical AND⁽¹⁾ANL <dest>, <src>dest opnd ← dest opnd Λ src opnd
Logical OR⁽¹⁾ORL <dest>, <src>dest opnd ← dest opnd ς src opnd
Logical Exclusive OR⁽¹⁾XRL <dest>, <src>dest opnd ← dest opnd ∀ src opnd
Clear⁽¹⁾CLR A(A) ← 0
Complement⁽¹⁾CPL A(A) ← ∅ (A)
Rotate LeftRL A(A)_n+1 ← (A)_n, n = 0..6
(A)₀ ← (A)₇
Rotate Left CarryRLC A(A)_n+1 ← (A)_n, n = 0..6
(CY) ← (A)₇
(A)₀ ← (CY)
Rotate RightRR A(A)_n-1 ← (A)_n, n = 7..1
(A)₇ ← (A)₀
Rotate Right CarryRRC A(A)_n-1 ← (A)_n, n = 7..1
(CY) ← (A)₀
(A)₇ ← (CY)
Mnemonic
ANL
ORL
XRL
CLR
CPL
RL
RLC
RR
RRC
<dest>, <src>⁽¹⁾
A, Rn
A, dir8
A, at Ri
A, #data
dir8, A
dir8, #data
Rmd, Rms
WRjd, WRjs
Rm, #data
WRj, #data16
Rm, dir8
WRj, dir8
Rm, dir16
WRj, dir16
Rm, at WRj
Rm, at DRk
A
A
A
A
A
A
Comments
register to ACC
Direct address (on-chip RAM or SFR) to ACC
Indirect address to ACC
Immediate data to ACC
ACC to direct address
Immediate 8-bit data to direct address
Byte register to byte register
Word register to word register
Immediate 8-bit data to byte register
Immediate 16-bit data to word register
Direct address (on-chip RAM or SFR) to byte
register
Direct address (on-chip RAM or SFR) to word
register
Direct address (64K) to byte register
Direct address (64K) to word register
Indirect address (64K) to byte register
Indirect address (16M) to byte register
Clear ACC
Complement ACC
Rotate ACC left
Rotate ACC left through CY
Rotate ACC right
Rotate ACC right through CY
Binary Mode
Bytes
States
1
1
2
1⁽³⁾
1
2
2
1
2
2⁽⁴⁾
3
3⁽⁴⁾
3
2
3
3
4
3
5
4
4
3⁽³⁾
4
4
5
3⁽⁵⁾
5
4⁽⁶⁾
4
3⁽⁵⁾
4
4⁽⁵⁾
1
1
1
1
1
1
1
1
1
1
1
1
Source Mode
Bytes
States
2
2
2
1⁽³⁾
2
3
2
1
2
2⁽⁴⁾
3
3⁽⁴⁾
2
1
2
2
3
2
4
3
3
2⁽³⁾
3
3
4
2⁽⁵⁾
4
3⁽⁶⁾
3
2⁽⁵⁾
3
3⁽⁵⁾
1
1
1
1
1
1
1
1
1
1
1
1
27
4135D–8051–08/05