ATMEGA329V_14 Datasheet, PDF (261/392 Pages) ATMEL Corporation – High Performance, Low Power Atmel

ATmega329/3290/649/6490
Table 25-5. Boundary-scan Signals for the ADC⁽¹⁾
Signal Name
COMP
ACLK
Direction as seen
from the ADC
Output
Input
ACTEN
Input
ADCBGEN Input
ADCEN
AMPEN
DAC_9
DAC_8
DAC_7
DAC_6
DAC_5
DAC_4
DAC_3
DAC_2
DAC_1
DAC_0
EXTCH
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
GNDEN
Input
HOLD
Input
IREFEN
Input
MUXEN_7
MUXEN_6
MUXEN_5
MUXEN_4
MUXEN_3
MUXEN_2
MUXEN_1
MUXEN_0
Input
Input
Input
Input
Input
Input
Input
Input
Description
Comparator Output
Clock signal to differential amplifier
implemented as Switch-cap filters
Enable path from differential amplifier to
the comparator
Enable Band-gap reference as negative
input to comparator
Power-on signal to the ADC
Power-on signal to the differential amplifier
Bit 9 of digital value to DAC
Bit 8 of digital value to DAC
Bit 7 of digital value to DAC
Bit 6 of digital value to DAC
Bit 5 of digital value to DAC
Bit 4 of digital value to DAC
Bit 3 of digital value to DAC
Bit 2 of digital value to DAC
Bit 1 of digital value to DAC
Bit 0 of digital value to DAC
Connect ADC channels 0 - 3 to by-pass
path around differential amplifier
Ground the negative input to comparator
when true
Sample & Hold signal. Sample analog
signal when low. Hold signal when high. If
differential amplifier are used, this signal
must go active when ACLK is high.
Enables Band-gap reference as AREF
signal to DAC
Input Mux bit 7
Input Mux bit 6
Input Mux bit 5
Input Mux bit 4
Input Mux bit 3
Input Mux bit 2
Input Mux bit 1
Input Mux bit 0
Recommended
Input when not
in use
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
1
0
0
0
0
0
0
0
0
1
Output Values when
recommended inputs are used,
and CPU is not using the ADC
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
1
0
0
0
0
0
0
0
0
1
2552K–AVR–04/11
261