AT43USB353M_04 Datasheet, PDF (26/95 Pages) ATMEL Corporation – Low Cost Full-speed USB Microcontroller with Embedded Hub, ADC and PWM

USB Interrupt
Sources
USB End-point
Interrupt Sources
The USB interrupts are described below.
Table 11. USB Interrupt Sources
Interrupt
Description
SOF Received
Whenever USB hardware decodes a valid Start of Frame. The frame
number is stored in the two Frame Number Registers.
EOF2
Activated whenever the hub's frame timer reaches its EOF2 time point.
Function EP0 Interrupt See “Control Transfers at Control End-point EP0” on page 58 for details.
Function EP1 Interrupt
For an OUT end-point it indicates that Function End-point 1 has received
a valid OUT packet and that the data is in the FIFO. For an IN end-point it
means that the end-point has received an IN token, sent out the data in
the FIFO and received an ACK from the Host. The FIFO is now ready to
be written by new data from the microcontroller.
Function EP2 Interrupt
For an OUT end-point it indicates that Function End-point 2 has received
a valid OUT packet and that the data is in the FIFO. For an IN end-point it
means that the end-point has received an IN token, sent out the data in
the FIFO and received an ACK from the Host. The FIFO is now ready to
be written by new data from the microcontroller.
Function EP3 Interrupt
For an OUT end-point it indicates that Function End-point 3 has received
a valid OUT packet and that the data is in the FIFO. For an IN end-point it
means that the end-point has received an IN token, sent out the data in
the FIFO and received an ACK from the Host. The FIFO is now ready to
be written by new data from the microcontroller.
Hub EP0 Interrupt
See “Control Transfers at Control End-point EP0” on page 58 for details.
FRWUP
USB hardware has received a embedded function remote wakeup
request.
GLB SUSP
USB hardware has received global suspend signaling and is preparing to
put the hub in the suspend mode. The microcontroller's firmware should
place the embedded function in the suspend state.
RSM
USB hardware received resume signaling and is propagating the resume
signaling. The microcontroller's firmware should take the embedded
function out of the suspended state.
BUS RESET
USB hardware received a USB bus reset. This applies only in cases
where a separation between USB bus reset and microcontroller reset is
required. Be very careful when using this feature.
All interrupts have individual enable, status, and mask bits through the interrupt enable regis-
ter and interrupt mask register. The Suspend and Resume interrupts are cleared by writing a 0
to the particular interrupt bit. All other interrupts are cleared when the microcontroller sets a bit
in an interrupt acknowledge register.
An assertion or activation of one or more bits in the end-point's Control and Status Register
triggers the end-point interrupts. These triggers are different for control and non-control end-
points as described in Table 12. Please refer to the Control and Status Register for more
information.
26 AT43USB353M
3307B–USB–4/04