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ATMEGA323L_14 Datasheet, PDF (245/247 Pages) ATMEL Corporation – Non-volatile Program and Data Memories
1457G–AVR–09/03
ATmega323(L)
Using the On-chip Debug System .................................................................... 161
On-chip Debug Specific JTAG Instructions ...................................................... 162
Using the JTAG Programming Capabilities ...................................................... 163
IEEE 1149.1 (JTAG) Boundary-Scan .............................................. 164
Features............................................................................................................ 164
System Overview.............................................................................................. 164
Data Registers .................................................................................................. 165
Boundary-Scan Specific JTAG Instructions...................................................... 166
Boundary-Scan Chain....................................................................................... 168
ATmega323 Boundary-Scan Order .................................................................. 172
Boundary-Scan Description Language Files .................................................... 176
Memory Programming..................................................................... 177
Boot Loader Support......................................................................................... 177
Entering the Boot Loader Program ................................................................... 179
Capabilities of the Boot Loader......................................................................... 179
Self-programming the Flash ............................................................................. 179
Boot Loader Lock Bits....................................................................................... 180
EEPROM Write Prevents Writing to SPMCR ................................................... 182
Preventing Flash Corruption ............................................................................. 184
Program and Data Memory Lock Bits............................................................... 186
Parallel Programming ....................................................................................... 188
Serial Downloading........................................................................................... 197
Programming via the JTAG Interface ............................................ 202
Programming specific JTAG instructions.......................................................... 202
Data Registers .................................................................................................. 203
Reset Register .................................................................................................. 203
Programming Enable Register.......................................................................... 203
Programming Command Register .................................................................... 204
Virtual Flash Page Load Register................................................... 208
Virtual Flash Page Read Register .................................................................... 209
Programming algorithm .................................................................................... 209
Electrical Characteristics................................................................ 213
Absolute Maximum Ratings*............................................................................. 213
DC Characteristics............................................................................................ 213
External Clock Drive Waveforms ...................................................................... 215
External Clock Drive ......................................................................................... 215
Two-wire Serial Interface Characteristics ..................................... 216
ATmega323 Typical Characteristics – Preliminary Data .............. 218
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