ATMEGA48PA_14 Datasheet, PDF (24/326 Pages) ATMEL Corporation – 131 Powerful Instructions – Most Single Clock Cycle Execution

9. System Clock and Clock Options
9.1 Clock Systems and their Distribution
Figure 9-1 presents the principal clock systems in the AVR^® and their distribution. All of the clocks need not be active at a
given time. In order to reduce power consumption, the clocks to modules not being used can be halted by using different
sleep modes, as described in Section 10. “Power Management and Sleep Modes” on page 35. The clock systems are
detailed below.
Figure 9-1. Clock Distribution
Asynchronous
Timer/Counter
General I/O
Modules
ADC
CPU Core
RAM
Flash and
EEPROM
clk_I/O
clk_ASY
clk_ADC
AVR Clock
Control Unit
System Clock
Prescaler
clk_CPU
clk_FLASH
Reset Logic
Watchdog Timer
Source clock
Clock
Multiplexer
Watchdog clock
Watchdog
Oscillator
Timer/Counter
Oscillator
External Clock
Crystal
Oscillator
Low-frequency
Crystal Oscillator
Calibrated RC
Oscillator
9.1.1
CPU Clock – clk_CPU
The CPU clock is routed to parts of the system concerned with operation of the AVR core. Examples of such modules are
the general purpose register file, the status register and the data memory holding the stack pointer. Halting the CPU clock
inhibits the core from performing general operations and calculations.
9.1.2
I/O Clock – clk_I/O
The I/O clock is used by the majority of the I/O modules, like Timer/Counters, SPI, and USART. The I/O clock is also used by
the external interrupt module, but note that start condition detection in the USI module is carried out asynchronously when
clk_I/O is halted, TWI address recognition in all sleep modes.
Note:
Note that if a level triggered interrupt is used for wake-up from power-down, the required level must be held
long enough for the MCU to complete the wake-up to trigger the level interrupt. If the level disappears before
the end of the start-up time, the MCU will still wake up, but no interrupt will be generated. The start-up time is
defined by the SUT and CKSEL fuses as described in
Section 9. “System Clock and Clock Options” on page 24.
24 ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14