ATMEGA3290V_14 Datasheet, PDF (231/392 Pages) ATMEL Corporation – High Endurance Non-volatile Memory Segments

ATmega329/3290/649/6490
when using 1/3 duty. To achieve satisfactory contrast, all segments on the LCD display must
therefore be able to be fully charged/discharged within 2 or 2.7ms, depending on the number of
common pins.
23.1.10
Minimizing power consumption
By keeping the percentage of the time the LCD drivers are turned on at a minimum, the power
consumption of the LCD driver can be minimized. This can be achieved by using the lowest
acceptable frame rate, and using low power waveform if possible. The drive time should be kept
at the lowest setting that achieves satisfactory contrast for a particular display, while allowing
some headroom for production variations between individual LCD drivers and displays. Note
that some of the highest LCD voltage settings may result in high power consumption when V_CC
is below 2.0V. The recommended maximum LCD voltage is 2*(V_CC - 0.2V).
23.2 Mode of Operation
23.2.1
Static Duty and Bias
If all segments on a LCD have one electrode common, then each segment must have a unique
terminal.
This kind of display is driven with the waveform shown in Figure 23-3. SEG0 - COM0 is the volt-
age across a segment that is on, and SEG1 - COM0 is the voltage across a segment that is off.
Figure 23-3. Driving a LCD with One Common Terminal
V_LCD
GND
SEG0
V_LCD
GND
COM0
V_LCD
GND
SEG0 - COM0
-V_LCD
Frame
Frame
V_LCD
GND
V_LCD
GND
SEG1
COM0
GND
SEG1 - COM0
Frame Frame
23.2.2
1/2 Duty and 1/2 Bias
For LCD with two common terminals (1/2 duty) a more complex waveform must be used to indi-
vidually control segments. Although 1/3 bias can be selected 1/2 bias is most common for these
displays. Waveform is shown in Figure 23-4. SEG0 - COM0 is the voltage across a segment that
is on, and SEG0 - COM1 is the voltage across a segment that is off.
2552K–AVR–04/11
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