AT89S51_14 Datasheet, PDF (23/31 Pages) ATMEL Corporation – 4K Bytes of In-System Programmable (ISP) Flash Memory

AT89S51
24. AC Characteristics
Under operating conditions, load capacitance for Port 0, ALE/PROG, and PSEN = 100 pF; load capacitance for all other
outputs = 80 pF.
24.1 External Program and Data Memory Characteristics
12 MHz Oscillator
Symbol
Parameter
Min
Max
1/t_CLCL
t_LHLL
t_AVLL
t_LLAX
t_LLIV
t_LLPL
t_PLPH
t_PLIV
t_PXIX
t_PXIZ
t_PXAV
t_AVIV
t_PLAZ
t_RLRH
t_WLWH
t_RLDV
t_RHDX
t_RHDZ
t_LLDV
t_AVDV
t_LLWL
t_AVWL
t_QVWX
t_QVWH
t_WHQX
t_RLAZ
t_WHLH
Oscillator Frequency
ALE Pulse Width
Address Valid to ALE Low
Address Hold After ALE Low
ALE Low to Valid Instruction In
ALE Low to PSEN Low
PSEN Pulse Width
PSEN Low to Valid Instruction In
Input Instruction Hold After PSEN
Input Instruction Float After PSEN
PSEN to Address Valid
Address to Valid Instruction In
PSEN Low to Address Float
RD Pulse Width
WR Pulse Width
RD Low to Valid Data In
Data Hold After RD
Data Float After RD
ALE Low to Valid Data In
Address to Valid Data In
ALE Low to RD or WR Low
Address to RD or WR Low
Data Valid to WR Transition
Data Valid to WR High
Data Hold After WR
RD Low to Address Float
RD or WR High to ALE High
127
43
48
233
43
205
145
0
59
75
312
10
400
400
252
0
97
517
585
200
300
203
23
433
33
0
43
123
Variable Oscillator
Min
Max
0
33
2 t_CLCL-40
t_CLCL-25
t_CLCL-25
t_CLCL-25
3 t_CLCL-45
0
4 t_CLCL-65
3 t_CLCL-60
t_CLCL-8
t_CLCL-25
5 t_CLCL-80
10
6 t_CLCL-100
6 t_CLCL-100
0
5 t_CLCL-90
3 t_CLCL-50
4 t_CLCL-75
t_CLCL-30
7 t_CLCL-130
t_CLCL-25
2 t_CLCL-28
8 t_CLCL-150
9 t_CLCL-165
3 t_CLCL+50
0
t_CLCL-25
t_CLCL+25
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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2487D–MICRO–6/08