ATR0635 Datasheet, PDF (22/33 Pages) ATMEL Corporation – ANTARIS4 Single-chip GPS Receiver SuperSense

The RTC section will be initialized properly if VDD18 is supplied first to the ATR0635. If VBAT is
applied first, the current consumption of the RTC and backup SRAM is undetermined.
Figure 4-2. Connecting Example: Common Power Supplies for RF and Digital Part Using the Internal LDOs
ATR0635 internal
2.7V to 3.3V
NSHDN
VCC1
VCC2
VBP
VDIG
LDO_IN
LDO_EN
LDO_OUT
RF
ldoin
ldoen
ldoout
LDO18
1 µF
(X7R)
1.5V to 3.6V
VDD18
VDDIO
1 µF
(X7R)
LDOBAT_IN
VBAT
VBAT18
Core
1.8V to 3.3V
variable IO domain
ldobat_in
vbat
vbat18
LDOBAT
VDD
RTC
backup memory
0V or 3V to 3.6V
VDDUSB
USB SM and
transceiver
The USB Transceiver is disabled if VDD_USB < 2.0V. In this case the pins USB_DM and
USB_DP are connected to GND (internal pull-down resistors). The USB Transceiver is enabled
if VDD_USB within 3.0V and 3.6V.
22 ATR0635
4928C–GPS–06/06