ATMEGA8_10 Datasheet, PDF (22/25 Pages) ATMEL Corporation – 8-bit with 8K Bytes In-System Programmable Flash

6. Added note under “Filling the Temporary Buffer (Page Loading)” on page 216 about
writing to the EEPROM during an SPM Page load.
7. Removed ADHSM completely.
8. Added section “EEPROM Write during Power-down Sleep Mode” on page 23.
9. Removed XTAL1 and XTAL2 description on page 5 because they were already
described as part of “Port B (PB7..PB0) XTAL1/XTAL2/TOSC1/TOSC2” on page 5.
10. Improved the table under “SPI Timing Characteristics” on page 246 and removed the
table under “SPI Serial Programming Characteristics” on page 241.
11. Corrected PC6 in “Alternate Functions of Port C” on page 61.
12. Corrected PB6 and PB7 in “Alternate Functions of Port B” on page 58.
13. Corrected 230.4 Mbps to 230.4 kbps under “Examples of Baud Rate Setting” on page
159.
14. Added information about PWM symmetry for Timer 2 in “Phase Correct PWM Mode”
on page 113.
15. Added thick lines around accessible registers in Figure 76 on page 169.
16. Changed “will be ignored” to “must be written to zero” for unused Z-pointer bits
under “Performing a Page Write” on page 216.
17. Added note for RSTDISBL Fuse in Table 87 on page 223.
18. Updated drawings in “Packaging Information” on page 14.
Changes from Rev. 1. Added errata for Rev D, E, and F on page 17.
2486H-09/02 to
Rev. 2486I-12/02
Changes from Rev. 1. Changed the Endurance on the Flash to 10,000 Write/Erase Cycles.
2486G-09/02 to
Rev. 2486H-09/02
Changes from Rev. 1. Updated Table 103, “ADC Characteristics,” on page 248.
2486F-07/02 to
Rev. 2486G-09/02
Changes from Rev. 1. Changes in “Digital Input Enable and Sleep Modes” on page 55.
2486E-06/02 to
Rev. 2486F-07/02
2. Addition of OCS2 in “MOSI/OC2 – Port B, Bit 3” on page 59.
3. The following tables have been updated:
Table 51, “CPOL and CPHA Functionality,” on page 132, Table 59, “UCPOL Bit Settings,”
on page 158, Table 72, “Analog Comparator Multiplexed Input(1),” on page 195, Table 73,
22 ATmega8(L)
2486XS–AVR–06/10