ATMEGA6490V_14 Datasheet, PDF (219/392 Pages) ATMEL Corporation – High Endurance Non-volatile Memory Segments

ATmega329/3290/649/6490
Figure 22-9. ADC Power Connections
PA0 51
VCC ₅₂
GND
53
(ADC7) PF7 54
(ADC6) PF6 55
(ADC5) PF5 56
(ADC4) PF4 57
(ADC3) PF3 58
(ADC2) PF2 59
(ADC1) PF1 60
(ADC0) PF0 61
10μΗ
AREF 62
GND ₆₃
AVCC ₆₄
100nF
1
Analog Ground Plane
22.5.6
ADC Accuracy Definitions
An n-bit single-ended ADC converts a voltage linearly between GND and V_REF in 2ⁿ steps
(LSBs). The lowest code is read as 0, and the highest code is read as 2ⁿ-1.
Several parameters describe the deviation from the ideal behavior:
• Offset: The deviation of the first transition (0x000 to 0x001) compared to the ideal transition
(at 0.5 LSB). Ideal value: 0 LSB.
Figure 22-10. Offset Error
Output Code
2552K–AVR–04/11
Offset
Error
Ideal ADC
Actual ADC
V_REF Input Voltage
219