ATF1508BE Datasheet, PDF (21/30 Pages) ATMEL Corporation – Highperformance CPLD

ATF1508BE
Table 11-1. AC Characteristics (Continued)⁽¹⁾
Symbol
t_ZX1
Parameter
Output Buffer Enable Delay
(High Drive; C_L = 35 pF)
t_ZX2
Output Buffer Enable Delay
(Low Drive; C_L = 35 pF)
t_XZ
t_SUI
t_HI
t_FSUI
t_FHI
t_RD
t_COMB
t_IC
t_EN
t_GLOB
t_PRE
t_CLR
t_UIM
t_SCH
Output Buffer Disable Delay (C_L = 5 pF)
Register Setup Time
Register Hold Time
Register Setup Time of Fast Input
Register Hold Time of Fast Input
Register Delay
Combinatorial Delay
Array Clock Delay
Register Enable Time
Global Control Delay
Register Preset Time
Register Clear Time
Switch Matrix Delay
Schmitt Trigger Added Delay
t_SSO
Output Added Delay for V_CCIO Level
(LD)
SSTL2-1_IAD⁽²⁾
SSTL3-1_IAD⁽²⁾
SSTL Input Delay Adder (HD)
SSTL2-1_OAD⁽²⁾
SSTL3-1_OAD^{(2) SSTL Output Delay Adder (HD)}
Note: 1. See ordering information for valid part numbers.
2. SSTL is not supported for low drive output (LD).
V_CCIO = 1.5V
V_CCIO = 1.8V
V_CCIO = 2.5V
V_CCIO = 3.3V
V_CCIO = 1.5V
V_CCIO = 1.8V
V_CCIO = 2.5V
V_CCIO = 3.3V
V_CCIO = 1.5V
V_CCIO = 1.8V
V_CCIO = 2.5V
V_CCIO = 3.3V
V_CCIO = 2.5V
V_CCIO = 3.3V
V_CCIO = 2.5V
V_CCIO = 3.3V
-5
Min
Max
5.0
4.5
3.5
3.0
6.0
5.5
4.5
4.0
4
1.7
0.5
0.5
0.5
0.7
1.2
1.8
2.5
1.8
1.75
1.75
0.5
1.5
6.5
5.5
5.25
5
1.5
1.5
1
1
-7
Min
Max
6.0
5.5
4.5
4.0
7.0
6.5
5.5
5.0
4
2.2
0.6
0.6
0.6
1.2
1.2
1.8
3
2
2
2
0.8
2
8.5
7.5
7.25
7
1.5
1.5
1
1
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
21
3663A–PLD–1/08